1. Field of Invention
The present invention relates to packaging of VCSELs and in particular to large size arrays of VCSELs on submounts and/or on printed circuit boards with other electronic components including current drivers, optical and electronic sensor systems, data storage and data processors, to incorporate multiple functionalities to achieve high optical power illumination, irradiation 2 and 3-dimensional imaging and 3-dimensional (3-D) printing systems.
2. Related Background Art
In the last few years lasers, and more especially VCSELs and VCSEL arrays, have found applications as sources for optical systems for high power illumination for general illumination, optical pumps for lasers and amplifiers, display and imaging applications, and medical applications just to name a few. The low divergence properties of lasers provide highly directional illumination suitable for high levels of illumination at great distances. The highly directional illumination also results in high brightness and high power density for optical pumping for lasers, amplifiers even in very narrow wavelength band for applications in a wide wavelength range. Visible and Infrared illumination can be obtained in a very narrow wavelength band allowing optical filtering for sensitive discrimination against background noise and efficient optical pumping of narrow spectral absorption bands. Also short pulsed illumination may be obtained for LIDAR type applications and for time domain distance discrimination applications such as seeing through fog, for motion and gesture detection.
VCSELs, either single device or in arrays, can be packaged to construct optical modules that are operated using external electronic circuits to provide operation and control functions, it is more practical to include electronic functions such as, device control, data transfer & processing, storage and analysis in the same package for operational ease and compactness. In the U.S. Pat. No. 5,708,280 issued on Jan. 14, 1998 to Lebby et al., describes a simple optical module including a plurality of Light Emitting Diodes (LEDs) and at least one VCSEL mounted on two opposite sides of a substrate together with an additional substrate to include electronic circuits for driving the optical components.
In another U.S. Pat. No. 6,816,523 issued on Nov. 9, 2004, to Glenn et al, multi-level, multi-cavity VCSEL packaging incorporating VCSELs and sensors is described. According to the description therein, the sensor is provided mainly for controlling driver current to the VCSELs for constant output power. The package is adaptable for Land Grid Array (LGA), Ball Grid Array (BGA) and Leadless Chip Carrier (LCC) for surface mounting. In a different approach, standard ASIC packaging is adapted for VCSEL packaging as has been described in the U.S. Pat. No. 6,922,496 issued on Jul. 26, 2005 to Morris. In the U.S. Pat. No. 7,049,704 issued on May 26, 2006 to Chakravorty et al. a flip-chip packaging is described for VCSELs in order to facilitate surface mounting.
Another trend in VCSEL packaging has been towards integrating various optoelectronic (OE) functions on the same side of the wafer using via connections at a wafer level, testing performance of individual functional modules before dicing. Such an approach has been described in the U.S. Pat. No. 5,300,540 issued on Mar. 19, 1996 to Jewell et al. One common element in all the methods referred above is that existing commonly utilized electronic packaging methods are adapted to incorporate VCSELs to extend it to OE functions.
One important aspect of packaging VCSELs is heat dissipation which requires particular attention for VCSEL arrays designed for high output optical power. In United States Patent Application publication No. 2004/0256630 published on Dec. 23, 2004 by Cao a thermal submount is described for additional heat dissipation capability is described. Using thermal submount is also described in the co-owned United State Patent Application Publication No. 2013/0163627 on Jun. 27, 2013, by Seurin et al. as well as in the U.S. Pat. No. 8,675,706 issued on Mar. 14, 2014, to Seurin et al. and assigned to the Assignee of this application. Both the methods may be adapted for wafer level processing. It may be noted that the thermal submount may also be adapted for incorporating other optical devices for example, a photodetector a sensor, and other electronic components with VCSELs, and is described in the U.S. Pat. No. 6,853,007 on Feb. 8, 2005, to Tatum et al., and in the co-owned U.S. Pat. No. 8,675,706 issued on Mar. 14, 2014, to Seurin et al.
In some OE packaging, optical beam shaping elements are integrated with basic OE functions. In a non-patent literature publication by Angelique Rissons and Jean-Claude Mollier entitled “The Vertical-Cavity Surface Emitting Laser (VCSEL) and Electrical Access Contribution” in Optoelectronics—Devices and Applications, Edited by Prof. P. Predeep, ISBN 978-953-307-576-1, pp. 227-254, published online in www.intechopen.com., published in print edition in October, 2011, simple lenses are integrated with VCSEL packaging to achieve a desired optical output beam shape. Integrated or external optical components are also used with VCSELs to obtain a desired optical profile in an optical illuminator and several examples have been described in co-owned U.S. Pat. No. 6,888,871 issued on May 3, 2005 to Zhang et al., and U.S. Pat. No. 8,675,706 issued on Mar. 14, 2014, to Seurin et al.
For high output power optical modules, it is extremely important that the thermal contact between the VCSEL device and the mounting platform such as a printed circuit/wiring board, a thermal submount or a heat sink is free of flux or air voids. While this can be achieved in many ways, a method particularly suited for a flux-less soldering process for VCSELs is described in the U.S. Pat. No. 4,921,157 issued on May 1, 1990 to Dishon et al. One advantage of this method is that no post soldering process to remove excess flux is needed. In a different approach described in the U.S. Pat. No. 6,601,753 issued on Aug. 5, 2003, to Baker et al. a method to expel air is described where pressure or force is applied on the chip while soldering. In a different approach soldering in an inert or reducing atmosphere is suggested.
While several of the commonly known methods used for packaging electronic components including integrated circuits (ICs) may be adapted for packaging VCSELs and VCSEL arrays or VCSEL array chips with or without additional electronic components, applying the same methods to large size VCSEL arrays ranging from several millimeters to a centimeter in linear dimensions, is still challenging. One particular problem arises from the fact that it is difficult to maintain a large size chip flat during the packaging process. This problem is particularly a challenge when the VCSEL chip is made thin or ultra-thin for better heat dissipation, and tends to warp. Furthermore, different parts of the VCSEL chip may warp differently and require different pressure or force while packaging. This application addresses some of the issues that are specific to large area VCSEL arrays.